Illustrate with logic symbols, the implementation of the following logic gates using NAND universal logic gates:
(a) AND gate
(b) OR gate
(c) Inverter Solution:
AND Gate: Two NAND gates can be used. First, feed the inputs into a NAND gate, and then invert the output using another NAND gate.
OR Gate: First, use two NAND gates to invert both inputs, and then feed them into a third NAND gate.
Inverter: A single input fed into both inputs of a NAND gate will produce the NOT operation (inversion).
Write down the following standard logic symbols in their equivalent alternate logic symbols:
AND gate, OR gate, NAND gate, NOR gate, NOT gate. Solution:
AND Gate (.) is equivalent to NAND Gate (.)’ (Inversion of AND).
OR Gate (+) is equivalent to NOR Gate (+)’ (Inversion of OR).
NAND Gate is the negation of the AND gate.
NOR Gate is the negation of the OR gate.
NOT Gate is its own inverse.
Simplify the following logic expressions using Boolean theorems:
(a) A.(A + B) = A
(b) A + A.B = A
(c) F = (A̅ + B)(A + B̅ + C) Solution:
(a) A.(A + B) = A (Absorption Law).
(b) A + A.B = A (Distributive Law).
(c) Simplify by expanding the terms.
SECTION B
Express the Boolean function F(A, B, C) = Σ(0, 2, 4, 5, 6) in a sum of min-terms.Solution: The min-terms represent the canonical form of the function based on the specified indices. Express each number in binary and then form the corresponding min-term.
Design the logic circuit to implement the Boolean function F = (A + B)(B̅ + C).Solution: Create a circuit where the OR gate handles the A + B part, and a second OR gate handles B̅ + C. Use an AND gate to combine their outputs.
Simplify the Boolean expression F(A, B, C) = Σ(1, 4, 5, 6, 7) using a Karnaugh Map.Solution: Draw the 3-variable K-map and plot the min-terms. Then group the ones and simplify accordingly.
Draw the logic diagram to implement a Half-Adder; construct its truth table.Solution:
Half-Adder Circuit: It involves XOR for the sum output and AND for the carry output.
Truth Table: A | B | Sum | Carry ------------------- 0 | 0 | 0 | 0 0 | 1 | 1 | 0 1 | 0 | 1 | 0 1 | 1 | 0 | 1
Explain the operation of the following Flip-Flops using a truth table: RS FF, JK FF.Solution:
RS Flip-Flop: When both inputs are 1, the output is invalid. Otherwise, it sets or resets based on the inputs.
JK Flip-Flop: It toggles when both J and K are 1, otherwise it behaves similarly to an RS flip-flop.
Show the logic circuit for implementing a 3-bit Binary counter using JK FFs.Solution: The JK flip-flops should be connected in such a way that the toggle happens sequentially, allowing the counting to progress from 0 to 7.
